yuyuranium

FPGA-Project-2022-simple-tpu. Systolic array based simple TPU for CNN on PYNQ-Z2

RTOS-Project-2023-riscv-freertos-on-pynq. Porting FreeRTOS to a RISC-V based system on PYNQ-Z2

bluespec-cmake. CMake modules for building Bluespec targets

tree-sitter-bsv. BSV grammar for tree-sitter

blokus-duo-tui. Online Blockus Duo game in terminal user interface.

fpga-hw0. Homework 0 of FPGA design

ToC-Project-2021-re2nfa-bot. Line bot that turns regular expression into NFA

ARC-AIoT-driver-feedback-system. C++

fpga-hw3. Homework 3 of FPGA design

vsd-test-github-flow. Repo to test and practice GitHub flow for VSD 2022

fpga-hw5. Homework 5 of FPGA design

fpga-hw2. Homework 2 of FPGA design

nvim-basic-ide. Stable Neovim configuration forked from LunarVim

fpga-hw4. Homework 4 of FPGA design

fpga-hw1. Homework 1 of FPGA design

uset. Micro set implementation using RB tree in C

hw1. uidd hw1 design