hongxiaoo

DOF_TaiWan. 一个基于DNF台服版本的修改以及研究指南

verilog-uart-1. Uart IP written in Verilog

vlmcsd.sh. Vlmcsd搭建KMS激活服务器一键脚本

Open_RegModel. :hatched_chick:Use ORDT and systemRDL tools to generate C/Verilog header files, register RTL, UVM register models, and docs from compiled SystemRDL.

verilog-eeprom. Verilog