Design Engineer. I'm really into Chisel language.
dirv. This is my first trial project for designing RISC-V in Chisel
17introductory-guide-to-chisel. 「Chiselを始めたい人に読んで欲しい本」のサンプルコード用リポジトリ
10dsim_trial. Trial environment for DSim
2learning-chisel3. Repository for learning Chisel3
2crypto. Crypto modules in Chisel.
2fpga-scr1. fpga simulation and synthesis for scr1 which designed by syntacore
1chisel-ci. ChiselのCI環境を構築するためのお試し環境
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