Monte da Caparica, Portugal / Delft, The Netherlands

Diogo André Silvares Dias

Advanced
@das-dias

PhD Candidate (Micro-Nanoelectronics) | Diagnostic Ultrasound on Chip Systems

novaad. An EDA tool for automatic device sizing using Gm/Id method.

17

computational-electromagnetics. Jupyter Notebook

10

layout3mesh. A package for converting IC layout (OASIS/GDS2) into 3D formats such as .GLB/glTF2.0, to load to the web.

9

layout2svg. A package for converting IC layout (OASIS/GDS2) into SVG, to load to the web.

4

k-wave-tudelftaux. MATLAB

1

collaspi. Post-Layout Simulation Speedup through PEX-Generated Netlist Reduction.

1

signal-converters-notebooks. Practical examples on Signal Converter Systems high level modelling and statistical yeild analysis using Jupyter Notebooks.

1

doceispaper. DoCEIS Conference Paper Template based on Springer Lecture Notes in Computer Science Template.

1

reds. Integrated circuit layout verification tool, dedicated to analog and mixed-signals (AMS) ICs IR-Drop verification.

1
9
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