Poolesville, Maryland

R. Timothy Edwards

Elite
@RTimothyEdwards

magic. Magic VLSI Layout Tool

678

qflow. Qflow full end-to-end digital synthesis flow for ASIC designs

235

XCircuit. XCircuit circuit drawing and schematic capture tool

144

netgen. Netgen complete LVS tool for comparing SPICE or verilog netlists

137

qrouter. Qrouter detail router for digital ASIC designs

58

irsim. IRSIM switch-level simulator for digital circuits

37

capiche. Parasitic capacitance analysis of foundry metal stackups

21

tutorial_layout. Repository of files associated with the webinar on analog layout using magic and klayout with Matt Venn.

17

sky130_ef_ip__opamp. Instrumentation amplifier (analog IP example)

12

ravenna_standalone. A lightweight version of the efabless Ravenna RISC-V processor chip design files for public access

10

caravel_openframe_project. Example digital project for the Efabless Caravel "openframe" harness

10

chipalooza_projects_1. Chipalooza challenge first test chip of projects

7

tclftdi. Tcl/Tk console based test system for development boards with FTDI chips. Also supports GPIB and instrumentation over ethernet.

6

chaos_automaton. Chaos Automaton (efabless Caravel harness digital project)

6

sky130_ef_ip__biasgen. Current bias generator circuit for distributing bias currents to analog circuits.

4

chipalooza_projects_2. 2nd test chip of Chipalooza analog IP

4

sky130_ef_ip__rdac3v_8bit. 8-bit resistor ladder DAC with 3.3V output range

4

sky130_ef_ip__rc_osc_16M. 16MHz (nominal) current-starved ring oscillator

4

sky130_ef_ip__xtal_osc_32k. Low power, low speed (32.768kHz) crystal oscillator circuit for sky130 technology

3

sky130_ef_ip__samplehold. Analog 3.3V sample and hold circuit, with buffered output

3

fracn_dll. Alternative version of the Caravel digital locked loop (DLL) with a fractional feedback divider

3

vsd_lvs_lab. Laboratory exercises for the VSD course on physical verification, part 5: LVS

3

sky130_ef_ip__cdac3v_12bit. 12-bit capacitive DAC

3

vsd_drc_lab. Laboratory exercises for the VSD course on physical verification, part 3, DRC

3

contact_programmed_ROM_cells. Set of layouts for contact-programmed ROM values of various bit widths.

2

sky130_ef_ip__ccomp3v. Continuous analog comparator, 1mV resolution

2

sky130_ef_ip__xtal_osc_16M. High speed (16MHz) crystal oscillator in sky130 technology

2

tt10-eink-driver. Driver for the Adafruit 2.13" 250x122 monochrome e-ink display

1

sky130_ef_ip__rheostat_8bit. 8-bit programmable rheostat with 50kohm end-to-end resistance, in the sky130 process.

1

ttihp-eink-driver. A simple test driver for the Adafruit 2.13" e-ink display board.

1

caravel_testing. Temprorary test of the project build procedure

1

tt10-sine-synth. Simple music synthesizer that generates sine waves over an octave, using the input PMOD pins for keys.

1

FOSSi_workshop. Files related to FOSSi Latch-Up 2024 workshop, Sunday, April 21, 2024.

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