Aruna Jayasena

duo-de. Surface Duo Dual Experience ( 🍰 AOSP | Android 16 | DUO1 | DUO2 )

FPGA-stereo-Camera-Basys3. Integration of two camera 📷 modules to Basys 3 FPGA

RTK-NTRIP-RTCM. Contains program to Send RTCM3 📡 data to Hosted NTRIP server and fetch NTRIP data and display on another rover. Real time kinematic supported base and rover (Ublox-M8P) GPS units are required.

FPGA_depthMap. Using stereo vision 👀 to identify the obstacles by processing images on a FPGA

FPGA-DepthMap-Basys3. Realtime depth map 🏞️ generation using SSD algorithm on low end Basys 3 FPGA. Support 320x240 and 160x120 resolutions.

ice40lib. Peripheral library 📚 for open source FPGAs based on iCE40. (Configured for ICESugar-Nano)

sweetRV. sweetRV 🧁 is a SoC with a minimal RISC-V processor with firmware for IceSugar-Nano FPGA

rsa4k. Verilog implementation of RSA 4096

TrafficLightController. Design a sequential circuit (FSM) and implement using Verilog

rpi-be200. GitHub Mirror of Intel BE200 Wifi Module Linux Firmware

StopWatch-Basys3. Stopwatch ⏱️ implemented using Verilog with Vivado

XOR-FPGA. How I inferred XOR neural network on FPGA with 8-bits

Cleo. 🚨 Cryptographic Leakage evaluation on Hardware

AREST. Simple Greedy algorithm AREST, which can find you the best state encoding for a given FSM that is resistant against Laser Fault Injection (LFI) attacks.

eKema. Machine learning for Paddy cultivation

SnpsTools. Simple beginner tutorial for Synopsys tool chain

TrojanWars. TrojanWars🐎 - Test Generation for activation of malicious hardware implants

rv32firmware. Simple introduction to firmware and how tos

DIY-PRM_01. Arduino PRM01 module for RadioLink At9 and At10

ImageFilters. Alpha trimmed mean filter and Adaptive filter implemented using Scilab

V2G. Verilog variables descriptions to graphs converting tool

NanoProcessor. A simple microprocessor (hence, called a nanoprocessor) created using ISE design suite capable of executing a simple set of instructions.

550_DRONE_CAD_PX4. 3D model of the Final drone assembly for the Simulation

Kobuki-Serial-Controller. Serial raw python implementation for controlling Kobuki Robot base

assert_NoC. Assertion based Network on Chip Security Implementation

ByteTorrent. Java

ProductCipher. Permutation and Random substitution text encryptor

DengAI. Solution to DengAI: Predicting Disease Spread HOSTED BY DRIVENDATA

ProNoC_MPSoC. Multiprocessor Network on Chip which consists of 4 Mork1x processors

PhiOS. (∅) PhiOS s a minimal operating system kernel 🌽 for RISC-V

RoboCat. Robust and Heavy-Duty Drone Platform 🕹️ (CAD model)

iobCache. Verilog

YosysFlatten. Flatten RTL hierarchy designs with Yosys

NoCDebug. Verilog