Analog-Sampling-and-Storage. A VHDL implementation of an interfacing with an ADC which stores data in a hitachi SRAM. This data can be retrieved later on at a rate of one sample per millisecond. Designed to store upto 8 seconds of data.

Problem

The full read on this project is a sign-in away — what it solves, who it serves, and where it sits in the market.

Audience

The full read on this project is a sign-in away — what it solves, who it serves, and where it sits in the market.

Market

The full read on this project is a sign-in away — what it solves, who it serves, and where it sits in the market.

Pricing

The full read on this project is a sign-in away — what it solves, who it serves, and where it sits in the market.