ASML-Wafer_Stepper. This project was for a course at TU/e called System Validation. The goal was to create an architecture with parallel components and use formal model checking to evaluate the model. The use case is a simplified EUV wafer stepper from ASML.

Problem

The full read on this project is a sign-in away — what it solves, who it serves, and where it sits in the market.

Audience

The full read on this project is a sign-in away — what it solves, who it serves, and where it sits in the market.

Market

The full read on this project is a sign-in away — what it solves, who it serves, and where it sits in the market.

Pricing

The full read on this project is a sign-in away — what it solves, who it serves, and where it sits in the market.