CTIF-Madrid-2018-FPGAs-Libres. Material del curso de DISEÑO DE SISTEMAS DIGITALES EN VERILOG USANDO FPGAS LIBRES. Centro: CTIF Madrid-capital, 2018

github.com/Obijuan/CTIF-Madrid-2018-FPGAs-Libres

Vaya's read on this project

Problem, audience, market, and the verdict — sign in to see it.

Updates

No recent activity.