Ethan Sifferman

labs-with-cva6. Advanced Architecture Labs with CVA6

schematics. Examples of how to Generate Schematics from SystemVerilog Synthesis Tools

fusesoc_template. Example of how to get started with olofk/fusesoc.

fpga_screensaver. This project implements the VGA protocol and allows custom images to be displayed to the screen using the Sipeed Tang Nano FPGA dev board.

sky130_schematics. Verified visual schematics for all SKY130 Cells

cse121_labs. Python

tangnano_example. Simple example of how to get started with the Tang Nano with FuseSoC.

vivado_acorn. An example repo showing how to get started with the Lite/NiteFury(II) and Sqrl Acorn 101/215(+) FPGAs

verilog_template. This project demonstrates a scalable format for Verilog including build scripts, design verification, and synthesis.

verilator_example. Shell

calculator. This project serves as a recreation of the chip-on-board found in most basic 8-digit calculators.

thesis. Ethan Sifferman Master's Thesis: "Advancing Synthesizable Verilog/SystemVerilog Education with Open-Source Tools and Autograders"

ben_eater-gpu. Recreation of Ben Eater's "World's Worst Video Card" in Verilog

fusesoc_project_template. A template for starting a Verilog project with FuseSoC integration, Icarus simulation, Verilator linting, Yosys usage report, and VS Code syntax highlighting.

commercial_tools. Build Scripts for Commercial SystemVerilog Tools

flip_flop_visualizer. Website to visualize the timing and schematics of flip-flops.

find_first_set. Find first set operation in Verilog-2001 with logarithmic complexity.

Wave-Parser. Takes in a wave file and reads its data.

xschem_3d. This project aims to create visual representations of voltage propogating through analog circuits. It uses Ngspice, Xschem, and Blender.

ternary_compression. Python

uart_example. SystemVerilog

ucsc-w25-cse293.

nes_controller_interface. NES Controller Interface written in Verilog-2005

github_ci_template. Example of how to run shell scripts with GitHub actions

graph-csr. Simple implementation of the CSR Graph Representation.

IEEEProjectClass-Website. Website for the classes I've taught through UCSB IEEE. Topics include website development, binary hacking, and FPGA programming.

MaxCut-UnitIntervalGraphs. This app allows for rapid testing of algorithm ideas.

ngspice_example. C++