This is your work, valued

Scotland

Guy Hutchison

Elite
@hutch31

Hardware engineer and experimenter

tv80. TV80 Z80-compatible microprocessor

59

sdlib. srdy-drdy library

9

Balsa-AES-Core. Asynchronous AES core written using the Balsa hardware description language

7

vpi_pcap_dump. Dump packets from Verilog to a pcap file using VPI calls from simulator

6

dclib. Decoupled library, a group of useful components implementing the DecoupledIO interface from Chisel3

4

ChiselCodeGenerator. Template for a Chisel-based code generator with a Java front end

1

chisel-packetlib. Scala

1

balsa4. Snapshot of the Balsa 4.0 asynchronous synthesis toolset from Manchester University

1

MACsec-Test-Vectors.

1

teamgantt-proj-import. TeamGantt Project Importer

1

chisel-exercises. Self-paced exercises for learning Chisel code

1