Dan Gisselquist

zipcpu. A small, light weight, RISC CPU soft core

wb2axip. Bus bridges and other odds and ends

sdspi. SD-Card controller, using either SPI, SDIO, or eMMC interfaces

wbuart32. A simple, basic, formally verified UART controller

eth10g. 10Gb Ethernet Switch

dblclockfft. A configurable C++ generator of pipelined Verilog FFT cores

autofpga. A utility for Composing FPGA designs from Peripherals

vgasim. A Video display simulator

dspfilters. A collection of demonstration digital filters

openarty. An Open Source configuration of the Arty platform

cordic. A series of CORDIC related projects

dpll. A collection of phase locked loop (PLL) related projects

sdr. A basic Soft(Gate)ware Defined Radio architecture

qspiflash. A set of Wishbone Controlled SPI Flash Controllers

wbscope. A wishbone controlled scope for FPGA's

interpolation. Digital Interpolation Techniques Applied to Digital Signal Processing

wbi2c. Wishbone controlled I2C controllers

fftdemo. A demonstration showing how several components can be compsed to build a simulated spectrogram

s6soc. CMod-S6 SoC

zbasic. A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems

dbgbus. A collection of debugging busses developed and presented at zipcpu.com

rtcclock. A Real Time Clock core for FPGA's

wbsata. Wishbone SATA Controller

arrowzip. A ZipCPU based demonstration of the MAX1000 FPGA board

qoiimg. Quite OK image compression Verilog implementation

wbfmtx. A wishbone controlled FM transmitter hack

wbspi. A collection of SPI related cores

videozip. A ZipCPU SoC for the Nexys Video board supporting video functionality

icozip. A ZipCPU demonstration port for the icoboard

website. The ZipCPU blog

wbpwmaudio. A wishbone controlled PWM (audio) controller

zipversa. A Versa Board implementation using the AutoFPGA/ZipCPU infrastructure

xulalx25soc. A System on a Chip Implementation for the XuLA2-LX25 board

wbhyperram. A cross platform, formally verified, open source, hyperRAM controller with simulator

fwmpy. A multiply core generator

axidmacheck. AXI DMA Check: A utility to measure DMA speeds in simulation

wbpmic. Wishbone controller for a MEMs microphone

wbicapetwo. Wishbone to ICAPE interface conversion

autofpga-demo. A demonstration of how AutoFPGA can compose a design from simple components

tttt. A 4x4x4 Tic-Tac-Toe game suitable for porting to embedded hardware platforms

kimos. Enclustra Mercury demonstration project

tinyzip. A ZipCPU based demonstration for the TinyFPGA BX board

debouncer. Digital logic necessary to debounce buttons

zipstormmx. ZipSTORM-MX, an iCE40 ZipCPU demonstration project

openz7. OpenZ7, an open source Zynq demo based on the Arty Z7-20

cputest-harness. A simulation test harness, containing serial port, QSPI flash, and an output done I/O--just provide the CPU

SymbiYosys. SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows

xtimesheet. A very simple timesheet tracking program using text files and a GTK/Glade interface

yosys. Yosys Open SYnthesis Suite

OpenRC-Turbo. Java