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hdlConvertor. Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4
330hwt. VHDL/Verilog/SystemC code generator, simulator API written in python/c++
226d3-hwschematic. D3.js and ELK based schematic visualizer
122d3-wave. D3.js based wave (signal) visualizer
68pyDigitalWaveTools. Python library for operations with VCD and other digital wave files
55hwtLib. hardware library for hwt (= ipcore repo)
45hdlConvertorAst. Python library of AST nodes for SystemVerilog/VHDL, code generator, transpiler and translator
41hwtHls. LLVM based HLS library for HWToolkit (hardware devel. toolkit)
28sphinx-hwt. Sphinx extension for visual documentation of hardware written in HWT
12hwtGraph. Library for conversion of HWT hardware representation to graph formats for visualization purposes
11ipCorePackager. Scriptable IP-Core generator
9pycocotb. COCOTB like Verilator wrapper
8hwtBuildsystem. buildsystem for for HWToolkit (fpga devel. tools), Vivado, Modelsim, Quartus, Yosys etc.
7jupyter_widget_hwt. Jupyter widget with interactive schematic for hwt circuints
6VHDL_and_SV_formal_grammar_to_ANTLR4. Convert PDF with grammar of IEEE1076-2008 and IEEE1800-2017 to ANTLR4 grammar
6hwtIde. JavaScript
5pyMathBitPrecise. Python library for math with values on specified number of bits
5hwtHdlParsers. (System) Verilog, VHDL compatibility layer for HWToolkit library
5vscode-extension-digitalcircuitanalysis. Visual Studio Code extension for debuging of digital circuit design generation process
4verilator-meson. verilator (http://git.veripool.org/git/verilator) with meson buildsystem
4layeredGraphLayouter. Layered Graph Layouter
3openflow_analysis. utils for analysis and optimization of config files/rule-sets from the cloud/OF environment
2d3-hwschedulinggraphs. Typescript timeline graph (Gantt graph, task scheduling graph) for visualization of HLS schedule
2hwtHlsGdb. GDB server and client for hwtHls LLVM IR and MIR simulations
1hwtAxiPerfTester. Performance tester for AXI3 and AXI4 slaves (latency, throughput, various access patterns)
1pclass-vectorized. The library of vectorized packet classification algorithms
1ovs-swappable-cls. Open vSwitch modified for testing of classifier algs.
1libhwio. library for unified access to hardware resources
1py_dpaa2. Python wrapper for NXP (Freescale) DPAA2 architecture
1Altium_okruh_miscLib. Miscellaneous Altium Library
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